Question: What is the minimum ROM Address Bit Width needed to implement Table 1, and why? What is the minimum ROM Data Bit Width needed to implement Table 1, and why?

Background:

Outputs (binary) 02 01 00 Current State Next State 0 1 4 5 3 4 0 0 1 0 0 1 1 0 0 0 1 2 Table 1 Lab1 State Table In a ROM-based implementation of an FSM, each word of the ROM implements one line of the State Table. The address of a word corresponds to the line of the State Table that it implements (e.g. for Table 1, the word at address 2 would correspond to State 2). Each word of ROM data contains the outputs and the Next State information for the line it implements (e.g. for Table 1, the binary value stored in the word at address 2 would encode the outputs 010 and the next state 3). An FSM must have a memory element (in 2607 it was a set of flip flops) that remembers the current state during operation. In a ROM-based implementation of an FSM, the current state value stored in the memory element is used as a ROM address to select the word containing the encoding of the outputs and next state associated with the current state