Implement Table $1$ as a ROM$-$based FSM:

Use a Logisim ROM to implement the State Table. Configure the ROM for the minimum Address and

Data Bit Widths that can be used for this lab $($as per your answers to the questions above$).$ Program the

contents of the ROM appropriately.

Use a Logisim Register component $($label it $$Current State$)$ as the memory element to hold the Current

State value during operation. Configure the Current State Register appropriately, and connect its

outputs as the ROM address inputs.

Use the output from the Toggle Switch design presented in the Logisim Guide for SYSC $3006$ as the clock

input to the Current State Register, and configure the Register to be falling edge sensitive$.$

Direct the ROM Data outputs through a splitter. Configure the splitter to have the minimum possible

number of wires to successfully implement the lab. Split the wires containing the Next State encoding

into a bundle and feed this bundle back to the Current State Register data inputs. Split the remaining

wires out individually.

Connect each individual wire output from the splitter to an individual LED. Label the LEDs O$2$ O$1$ and O$0$

so they correspond with the Lab$1$ State Table.

Log the Output LED values $($see Simulate $$ Logging to set up Logisim to log data during simulation$).$

Toggle the Toggle Switch enough times to demonstrate the correct implementation of the FSM$.$

Record the simulation log as proof that the system works.