Question-1: ROM Address Generator(RAG) A 256x8 read only memory (ROM) is connected with a special type of 8 bit register called program counter. Program counter can operate in four possible modes: Mode of operation PC Modesel Description Increment 00 Value in program counter is incremented by 1 Decrement 01 Value in program counter is decremented by 1 Load data(Branching 10 A new 8 bit data can be loaded inside program mode) counter Retain data The current value of program counter remains unchanged In increment mode the PC will update value by one at each positive edge of the clock. In Branching mode a value of 8-bit will be loaded from outside. After this the PC will increment/decrement from this newly loaded value. The circuit diagram of problem is shown below: 11 RAG PC_RST PC PC_Modesel Read Only Memory(ROM) PC_Din ROM_DOut CLK Question 1-(a): Write a wrapper for PC and ROM. Then write a wrapper for top level module of the design, pretend that PC and ROM are already designed, just utilize their signatures to provide a code for top level design. Only shown instantiation of PC and ROM and interconnecting wires. (3) Question 1-(b): Write verilog code of program counter, in this case you don't need to write wrapper. Just assume that wrapper is already written. Provide DFG of PC and its behavioral level code? (4+3) Question 1-(c): Write test bench of the design. Test the design in all modes of operation; increment/decrement the PC for significant amount of time. Load a certain data into PC, and then test it in increment and decrement mode. (5) Page 1 of 13 Question-1: ROM Address Generator(RAG) A 256x8 read only memory (ROM) is connected with a special type of 8 bit register called program counter. Program counter can operate in four possible modes: Mode of operation PC Modesel Description Increment 00 Value in program counter is incremented by 1 Decrement 01 Value in program counter is decremented by 1 Load data(Branching 10 A new 8 bit data can be loaded inside program mode) counter Retain data The current value of program counter remains unchanged In increment mode the PC will update value by one at each positive edge of the clock. In Branching mode a value of 8-bit will be loaded from outside. After this the PC will increment/decrement from this newly loaded value. The circuit diagram of problem is shown below: 11 RAG PC_RST PC PC_Modesel Read Only Memory(ROM) PC_Din ROM_DOut CLK Question 1-(a): Write a wrapper for PC and ROM. Then write a wrapper for top level module of the design, pretend that PC and ROM are already designed, just utilize their signatures to provide a code for top level design. Only shown instantiation of PC and ROM and interconnecting wires. (3) Question 1-(b): Write verilog code of program counter, in this case you don't need to write wrapper. Just assume that wrapper is already written. Provide DFG of PC and its behavioral level code? (4+3) Question 1-(c): Write test bench of the design. Test the design in all modes of operation; increment/decrement the PC for significant amount of time. Load a certain data into PC, and then test it in increment and decrement mode. (5) Page 1 of 13