SEMANTICS:

0 Adder Inst Instruction Memory Adr Rs Rt Rd Imm16 nPC_sel RegDst Rd Rt Equal ALUctr Memto Reg 1 MemWr RegWr Rs RI sf sf st bus W Rw Ra Rb busA 32 RegFile bus B 0 32 clk 32 WrEn Adr clk imm 16 Data In 16 32 Data clk Memory 00 Mux 1 PC ALU Adder PC Ext Extender imm 16 ExtOp ALUST Figure 1: MIPS datapath with control signals Exercise 4. Consider the MIPS datapath with control signals as presented in Figure 1. (a) [8 marks] Give the control signals required to execute the instruction: slti $t1 $t4 125 The slti instruction is "set less than immediate and here performs Reg($t1] = Reg($t4] ','==','!=', 'or', 'and', 0 Adder Inst Instruction Memory Adr Rs Rt Rd Imm16 nPC_sel RegDst Rd Rt Equal ALUctr Memto Reg 1 MemWr RegWr Rs RI sf sf st bus W Rw Ra Rb busA 32 RegFile bus B 0 32 clk 32 WrEn Adr clk imm 16 Data In 16 32 Data clk Memory 00 Mux 1 PC ALU Adder PC Ext Extender imm 16 ExtOp ALUST Figure 1: MIPS datapath with control signals Exercise 4. Consider the MIPS datapath with control signals as presented in Figure 1. (a) [8 marks] Give the control signals required to execute the instruction: slti $t1 $t4 125 The slti instruction is "set less than immediate and here performs Reg($t1] = Reg($t4] ','==','!=', 'or', 'and