Question: Some portion of cache system A represented below. The system is byte-addressable and the block size is one word (4 bytes). The tag and line

Some portion of cache system A represented below. The system is byte-addressable and the block size is one word (4 bytes). The tag and line number are represented with a binary numbers. The contents of words in the block are represented with hexadecimal. 1. What is the size of the main memory of this system? 2. What is the size of the cache memory of this system? 3. If the CPU requests to read memory address A125BA, what data does the CPU receive? 4. If the CPU requests to read memory address A135C2, what data does the CPU receive? 5. If we access memory in the following order in cache system A: A1 FF B8 B1 FF B8 A1 FF B8 B1 FF B8 A1 FF B8 B1 FF B8 how many cache misses would occur for the data request

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