Question: Study the MIPS code part below and fill the following diagram according to MIPS pipeline architecture M1, M2, M3, M4, M5, M6, M7 and M8

Study the MIPS code part below and fill the following diagram according to MIPS pipeline architecture M1, M2, M3, M4, M5, M6, M7 and M8 are pseudo registers and they are presumed to be loaded with correct values You can draw arrow lines to depict flow of values between consequtive stages

LW M7, 8(M2)

#L1

LW M5, 24(M6) #12

ADD M1, M5, M7 #13

SW M1, 8(M8) #L4

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