Subject - Computer Organization and Architecture [ Theory ]

Before Solving this problem, please go through all the requirements. It's my kind request to you.

I added sample questions and answers for your better understanding. from all of them, here is one red-quark question! You have to solve that question only. Please follow this pattern. Without this method, our instructor does not accept any solution. Please, take enough time, approximately 10-12 hrs for solving, but don't write irrelevant something. Please try to understand my situation.

# I have posted this question several times, but one of your experts solved the wrong number with an irrelevant answer. It's too much pathetic for me. Did I purchase it for it? You can take enough time to solve this problem, and if you don't have enough knowledge to solve this answer, please skip it.

Hi Experts! Would you please try to solve this as soon as possible with 100 % Accuracy? If possible, please do it.

You have to follow some instructions which I mentioned below. If you don't follow my instructions, please skip my questions.

You have to answer only #1 RED MARKS. I repeated, don't do other numbers.

Instructions are given,

• You need to show detailed calculations, as required.
• You need to provide clear diagrams, as required. All diagrams should be clearly drawn

Question --------

Any submission after deadline will be REJECTED You need to show detailed calculations, as required. You need to provide clear diagrams, as required. 1 1. 10 (2+6+2) Use the Booth algorithm to multiply -12 by +14. Draw the schematic of hardware and show the contents of each section after each iteration using a Table, given below: Iteration OPERATION Content of Content of Content Content of Content of register register A register Q of Q-1 Q.Q.1 M Initial Value Initialization Iteration-1 Iteration-2 If a CPU runs at 3GHz and each iteration requires 3 clock cycles, calculate the execution time for this multiplication. Ang to the ques-1 Algorithm & Booth's Stant M multiplicand 8 > Multiplien. aqo y 0 A s 0 no, of bits 10 01 as CD Az A-M Az Atm NO shift rought Agao) yes Tn2o27 TS Result in AB stop by Content content of Bo01 content of register lot G-1 O 00 00100 Hereation Opercation content I content 04 rregister A register Initial value Initialization 00000 01.110 Itercation - Shitt right 00000 OD 111! 1 A 90 9-1 00110 00011 O to oo Joo 1 11 00 100 A = A-M 11 00100 OOOO1 1 Iteration Shitt right oool1 ABO -2 00100 3-1 01 1 shiut Ago 00100 00001 00 9-3 AR ATM 10000 DO 100 00 000 00 0 O1000X emitt yright A 000 do 1. 10 Use the Booth algorithm to multiply -17 by +19. Draw the schematic of hardware and show the contents of each section after each iteration using a Table, given below: (2+6+2) Iteration OPERATION Content of register A Content of register Q Conten t of Q- 1 Content of Q.Q1 Content of register M Initialization Initial Value Iteration-1 Iteration-2 If a CPU runs at 3.3GHz and each iteration requires 2 clock cycles, calculate the execution time for this multiplication