Question: Suppose that the interrupt sources Timer 2 overflow ( TOV 2 ) , Timer 0 clear timer on compare match ( CTC ) , external

Suppose that the interrupt sources Timer 2 overflow (TOV2), Timer 0 clear timer on compare match (CTC), external interrupt 0(INTO), external interrupt 1(INT1), and the UDR empty (UDRE) serial interrupt are enabled for the ATmega32.
Match the interrupt source with its position in the order that these interrupt sources are serviced if they occur at the same time.
1 is the first interrupt source serviced
2 is the second interrupt source serviced
5 is the last interrupt source serviced
1
2
3
4
5
[Choose]
[ Choose ]
Timer 2 Clear Timer on Compare Match (CTC) Interrupt
External Interrupt 0(INTO)
Timer 2 Overflow Interrupt
Timer 0 Overflow Interrupt
Receive Complete Interrupt
Transmit Complete Interrupt
Timer 0 Clear Timer on Compare Match (CTC) Interrupt
External Interrupt 1(INT1)
UDR Empty Interrupt
Suppose that the interrupt sources Timer 2

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