$$SWe have a RISC processor with enroll enlist number juggling guidelines that have the arrangement R1fl R2 operation R3. The pipeline for these directions keeps running with a 100 MHz clock with the accompanying stages: guideline get- 2 tickers, direction decipher 1 clock, get operands- 1 clock, execute: 2 tickers, and store result 1 clock. a) At what rate (in MIPS) would we be able to execute enroll enlist directions that have no information conditions with different guidelines? b) At what rate would we be able to execute the guidelines when each direction relies upon the consequences of the past direction? We execute inward sending. At what rate would we be able to now execute the guidelines at the point when each direction relies upon the consequences of the past guideline