The assembly sequence below creates a 32-bit immediate in x5 in all cases. What 1 new instruction could be added to the ISA to reduce the number of instructions in this function (instruction name only)? lui x5, 0x12345 addi x6, x0, 0x9AB slli x6, x6, 20 srli x6, x6, 20 add x5, x5, x6 ab How many instructions can be saved in the function using the new instruction? abs What RISC-V architectural feature creates the problem that the new instruction fixes (enter 1 to 4 ab words to describe this)? The assembly sequence below creates a 32-bit immediate in x5 in all cases. What 1 new instruction could be added to the ISA to reduce the number of instructions in this function (instruction name only)? lui x5, 0x12345 addi x6, x0, 0x9AB slli x6, x6, 20 srli x6, x6, 20 add x5, x5, x6 ab How many instructions can be saved in the function using the new instruction? abs What RISC-V architectural feature creates the problem that the new instruction fixes (enter 1 to 4 ab words to describe this)