The following algorithm is used to find the integer square root for an input integer number $x$

$[$ Ex$1$: if $n\{4,5,6,7,8\},$ then the result integer square $\sqrt[Y]{?}=2]$

$[$ Ex$2$: if $n\{9,10,11,12,13,14,15\},$ then the result integer square root $Y=3]$

Complete the following Verilog code to provide a behavioral implementation for this algorithm.

module SQRT$\_$Calculator $($

input CLK$,$

input $[9$:$0]x,$

output reg $[4$:$0]Y$

;

Your design should include the following pins:

CLK: $($negative edge trigger input clock$)$

$x$ : The input number $(10$ bits$)$Your design should include the following pins:

$1.$ CLK: $($negative edge trigger input clock$)$

$2.$ X: The input number $(10$ bits$)$

$3.$ Y: The result square root $(5$ bits$)$

$($Hint: define the variables A$,$ B$,$ and Q to be of size $11)$

Notes:

$$ Use behavioral description

$$ DO NOT use the following operators: $/,*,\%$

$$ DO NOT use an algorithmic state machine.

$$ The calculation should be synchronous with the clock $($the result should be calculated in

a single clock cycle at the falling edge of the input clock$)$

$$ You have to use EDA Playground for this assignment

You have to submit two files:

$1.$ A Verilog code to implement your Design.

$2.$ A testbench file to simulate and test your design:

a$.$ Set the clock period to be $2$ns$.$

b$.$ You have to cover all the possible cases for the input data $(1024$ different cases$)$

c$.$ For each case you have to:

i$.$ Select the value for X $($from $0$ to $1023)$

ii$.$ Wait for two clock cycles