Question: The following code is executed on the five - stage pipelined MIPS we studied in class. lw $ 1 , 4 0 ( $ 6
The following code is executed on the fivestage pipelined MIPS we studied in class. lw $$ add $ $ $ add $ $ $ sw $$ and $ $ $a Assume that there are no forwarding and no hazard detection no stalling mechanism Insert nops to ensure correct execution. b Assume no forwarding and no hazard detection as in a Use nops only when a hazard cannot be avoided by rearranging these instructions. Use register R to hold temporary values in your modified code, if necessary. c If the processor has forwarding, but we forgot to implement the hazard detection unit, what occurs when this unmodified code executes?
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