The opcode of SUB instruction (Form 1: SUB Rd, Rsx, Rsy) is given by 0x02. The Programmer's Model RTL is: Rd [ Rsx ] - [ Rsy ). The subtraction operation can be also performed using the addition operation by negating Rsy. The Programmer's Model RTL in such case is: Rd (Rsx] +/- Rsy ). Assume that the opcode of such SUB instruction is chosen to be 0x97. Note what the opcode of 0x07 is in the provided information sheet. The table below gives the microarchitecture-level RTL for each step of the execution states in the implementation for SUB R1, R3, R5 using the alternative SUB opcode of 0x97. State RTL EO T2 [NOT (R5)] T1 [T2] T2