Question: This assignment covers the different variants of memory: SR Latch, Level - Sensitive SR Latch, D Latch, D Flip Flop, Register. In this assignment you

This assignment covers the different variants of memory: SR Latch, Level-Sensitive SR
Latch, D Latch, D Flip Flop, Register.
In this assignment you will create each of those memory variants as a circuit by reusing
the previous one. Ultimately, you will create your own 8-bit register.
Tasks
The goal is to create an 8-bit register from scratch, using only the three basic logic gates
(inverting inputs of AND, OR gates is allowed, since this simply adds a NOT gates in
front of the respective input; also a NOR gates (OR and NOT gate chained together)
are okay to use).
Important:
Use the slides as reference for the circuits you have to create. You do not need to
research anything outside of the course material.
You are not allowed to use any of the built-in components in Logisim, except one 8-
bit register in the main/verification circuit. Note: Gates, wires, splitters, inputs,
outputs, clocks are considered wiring components and can be used!
The output Q or t (inverted value of the stored bit) is not necessary for this
assignment. Feel free to omit it. If you are adding Q/t as an output (optional),
make sure to use the correct output when using it as a subcircuit somewhere else.
Use the following labels:
S, R, Q for SR latch and additionally C for level-sensitive SR latch
D, C, Q for D latch
D, Clk, Q for D flip flop
i, Q, Clk for the register
Place the clock only in the verification circuit and pass it into the other components
that need it. Elsewhere, use a regular input.
Initially, the SR latch may give you an error on the output side of the circuit. This
is expected since the output is undefined as long as the latch was not set or reset.
Once it was set or reset, the error should be gone until the simulation is reset /
Logisim was restarted.
1. Create a subcircuit called "SR_Latch" and add the circuit for the SR latch.
2. Create a subcircuit called "Level_Sensitive_SR_Latch". Add "SR_Latch" as sub-
circuit(s) and the required circuit around it to create a level-sensitive SR latch.
3. Create a subcircuit called "D_Latch". Add "Level_Sensitive_SR_Latch" as sub-
circuit(s) and the required circuit around it to create a D latch.
4. Create a subcircuit called "D_Flip_Flop". Add "D_Latch" as subcircuit(s) and
the required circuit around it to create a D flip flop.
5. Create a subcircuit called "Register_4_bit". Add "D_Flip_Flop" as subcircuit(s)
and the required circuit around it to create an 4-bit register. Use one 4-bit input
and one 4-bit output. You will have to use splitters to connect everything to the
input/output.
6. Create a subcircuit called "Register_8_bit". Add two "Register_4_bit" as subcir-
cuit(s) and the required circuit around it to create an 8-bit register. Use one 8-bit
input and one 8-bit output. You will have to use splitters to connect everything
to the input/output.
7. Create a verification circuit with the name "MemoryTester" (or you can rename
the "main" circuit). Add your "Register_8_bit" and one instance of the Logisim
built-in 8-bit register (can be found in folder "Memory"; make sure to change the
data width accordingly). Create one 8-bit input (label: i) and connect it to the two
registers in parallel. If both registers are connected in parallel, they share the same
inputs, but have each their own outputs. Note: The built-in register needs a clock
to work - same as the one you created. Hover over each connector of the register,
to find the clock input. The "clear" and "enable" inputs can be left unconnected
for this assignment.
8. For the clock input in the verification circuit: You can either use a "manual clock"
(simple 1-bit input) and toggle it by hand or use the element "Clock" (can be found
in folder "Wiring"). To enable the clock element, go to "Simulate" and click "Ticks
Enabled". Make sure to adjust the "Tick Frequency" to an appropriate slow speed
that allows you to compare your register to the built-in one (e.g.0.5 Hz or 1 Hz).
Alternatively, you can also manually toggle the clock in the same way as a regular
1-bit input.
9. The stored 8-bit number of the register is supposed to be displayed on hex displays.
Since one hex display can only show one group of 4-bits, the 8-bit register output
needs to be split into two groups of 4-bits using a splitter (one group should have
bit 0-3 and the other bit 4-7). Then each of these two 4-bit groups can be connected
to a hex display (2 hex displays total per register). Make sure to position the hex
displays so the group with the MSB is on the left side and the group with the
LSB is on the right side. Do this for both registers (once for the register you built
yourself, a second time for the Logisim built-in register).
10. Test your verification circuit created in the previous step to confirm that both
registers behave exactly the same (hex displays show the same value and change
at the same time).

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