This diagram is the simple $1$ cycle$-$per$-$instruction ARM architecture we discussed in class.

For the following questions, assume that $PC=012343210,$ where the encoding for the ARM instruction

$ldrx7,[x6,24]$

is stored.

As a review, the ARM Idr $R_s,[R_b,D]$ instruction loads the contents of memory location $R_b,D$ and places them in register $R_s,$ and the address $R_b,D$ is determined by adding the displacement value $D$ to the contents of register $R_b.$