This exercise is intended to help you understand the relationship between forwarding, hazard detection, and ISA design. Problems in this exercise refer to the following sequence of instructions, and assume that it is executed on a 5-stage pipelined datapath as discussed in class (I have a few diagrams of what I think this referes to if needed):

add r5,r2,r1

lw r3,4(r5)

lw r2,0(r2)

or r3,r5,r3

sw r3,0(r5)

a) If there is no forwarding or hazard detection, insert nop instructions to ensure correct execution (minimize the number of nop instructions).

b) If there is forwarding, insert nop instructions to ensure correct execution (minimize the number of nop instructions).

c) Repeat a) but now use nop instructions only when a hazard cannot be avoided by changing or rearranging these instructions. You can assume register R7 can be used to hold temporary values in your modified code.

d) If the processor has forwarding, but we forgot to implement the hazard detection unit, what happens when this code executes?