Exercise 4.21

This exercise is intended to help you understand the relationship between forwarding, hazard detection, and ISA design. Problems in this exercise refer to the following sequences of instructions, and assume that it is executed on a 5-stage pipelined datapath:

Instruction sequence

a.

ADD R5,R2,R1

LW R3,4(R5)

LW R2,0(R2)

OR R3,R5,R3

SW R3,0(R5)

b.

LW R2,0(R1)

AND R1,R2,R1

LW R3,0(R2)

LW R1,0(R1)

SW R1,0(R2)

4.21.1 [5] <4.7> If there is no forwarding or hazard detection, insert NOPs to ensure correct execution. 4.21.2 [10] <4.7> Repeat 4.21.1 but now use NOPs only when a hazard cannot be avoided by changing or rearranging these instructions. You can assume register R7 can be used to hold temporary values in your modified code.

4.21.3 [10] <4.7> If the processor has forwarding, but we forgot to implement the hazard detection unit, what happens when this code executes?

4.21.5 [10] <4.7> If there is no forwarding, but there is a hazard detection unit, what happens when this code executes?

4.21.6 [20] <4.7> Employing data forwarding, hazard detection and instruction reordering, what is the best sequence for this code to execute in?