Tutorial 4 1. (a) If wi(t) is a step voltage in the network shown in Figure 1. Find the value of the resistor such that a 20% overshoot in voltage will be seen across the capacitor if C = 10 6F and L = 1H. R L + vi(t ) C Figure 1: RLC circuit (b) If vi(t) is a step voltage in the network shown in Figure 1. Find the values of R and C to yield a 20% overshoot and a 1 ms settling time for ve(t) if L = 1H