Two computers have the same processor and main memory, but different cache designs.

Cache A: 128 sets, 2-way set associative, 32-byte blocks, and it uses write-through.

Cache B: 256 sets, direct-mapped, 32-byte blocks, and it uses write-back.

For both computers the read miss time is 10 times the cache-read hit time. For the write-through cache, writing a 32-bit word (into the cache AND through to main memory) takes 5 times as long as a cache hit. For the write-back cache a write-hit (writing to a word within a block that is in the cache) takes the same time as a read hit. Writing a 32-byte dirty block back to main memory, done when that dirty block is to be replaced with a new block, takes 10 times as long as a cache-read hit. The caches are unified, that is they contain both instructions and data.

Assuming that no cache blocks are replaced in the time between the execution of two store instructions, how many writes to main memory will occur as a result of these two stores if they are both to the same address for Cache A? For Cache B?