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Exercise 2: (3 points) Using behavioral Verilog design four function arithmetic unit to show the operation of four operations add (+), sub (-), mul (*), and div (). The unit has two operands A and B as inputs, 4 bits each and 2 bits opcode inputs to select one operation The unit has one output Y that is 8 bits Exercise 3: (5 points) Using behavioral Verilog write code for a circuit that adds two 8-bits operands, and then shift the sum left four-bit positions into rsit 1 reg variable. Then shift the original sum right four-bit positions into rsit2 reg variable. 1- Write full behavioral Verilog code for this circuit -2- points 2- Write test bench file for this circuit and generate wave form output, also use $monitor to show test bench results in textual format -2- points 3- Generate schematic view for this circuit