$.$ Use JK flip$-$flops and external gates to design a $3-$bit synchronous binary state machine that has two modes of operation depending on its initial state. Mode $1$ Mode $2$ The initial state is $011.$ It cycles through the states $011->001->010->000->100$ and back to $011,$ and then repeats the cycle again when the clock is running. The initial state is $111.$ It cycles through the states $111->110->101$ and back to $111,$ and then repeats the cycle again when the clock is running Assume the two modes will run autonomously depending on their initial state. To simplify the design in this exam, there is no external control circuits or initial settings required but two modes must be operated by using ONE circuit block only. Using two separate circuits to operate each mode separately will NOT receive marks.