Using this transition table $($in image$)$: Draw a schematic that implements the state machine in digital logic. Use two flip$-$flops to hold

the state, and basic gates $($AND$,$ OR$,$ NOT, NAND, NOR$)$ for the next$-$state logic and output logic.

$($You likely first need to derive expressions for these pieces of logic, which you can do in any way

you want.$).$ Then using the graphic with the decoder, Fill in the middle of this schematic with gates needed to implement your state machine$$s

behavior.