VAD to CPU 1 Interrupt register (LSB) Disk - R lo Printer R AH A, Priority encoder Reader 12 R R Keyboard 13 0 (MSB) IEN IST Enable M M M Interrupt tu CPU INTACK from Mask register Time left M B M Interrupt to CPU INTACK from CPU Mask register Consider the parallel priority interrupt hardware shown below. a. Suppose that the disk requests an interrupt. What is the content of the interrupt register (R3R2R;Ro)?| ii. What is the value (in decimal) of the vector address VAD? b. Suppose that the printer and reader sent interrupt requests to the CPU simultaneously. What is the content of the interrupt register (R3RzR; Ro)? What is the value (in decimal) of the vector address VAD