VHDL help

R-type datapath for the mips

I need PCADD and PC for now.

can you please write the vhdl and the testbench for the two components?

Thank you

32 PCADD 31:26) 6 . Control ALU read address 132 112521) | 20:16) 115:11 32 Zero Instruction RegWrite _ rs - Register ird File - Write data PC Overflow 32 Dout [31:0) Instruction Memory ALUout Reset A 32 . ALUCnti clock ALU - Control Figure 6: Datapath for R-type instructions Table 1: R-type instructions to implement No Operation Mnemo Opcode hex Function hex nic Add add 00 Add unsigned addu Subract sub Subract unsigned subu And and Or or Xor xor Nor nor Set less than 00 Set less than unsigned *For splitting a bus into smaller width buses, use the Slice IP. 00 32 PCADD 31:26) 6 . Control ALU read address 132 112521) | 20:16) 115:11 32 Zero Instruction RegWrite _ rs - Register ird File - Write data PC Overflow 32 Dout [31:0) Instruction Memory ALUout Reset A 32 . ALUCnti clock ALU - Control Figure 6: Datapath for R-type instructions Table 1: R-type instructions to implement No Operation Mnemo Opcode hex Function hex nic Add add 00 Add unsigned addu Subract sub Subract unsigned subu And and Or or Xor xor Nor nor Set less than 00 Set less than unsigned *For splitting a bus into smaller width buses, use the Slice IP. 00