Question: What is a key advantage of using a parallel tree structure for multiplication hardware, as described in the context of Moore's Law? Group of answer

What is a key advantage of using a parallel tree structure for multiplication hardware, as described in the context of Moore's Law?
Group of answer choices
It enables multiplication with negative numbers without changing the algorithm
It requires fewer adders than a straightforward stack of adders
It reduces the number of add times needed from 32 to log2(32) add times
It allows for a constant time multiplication process, regardless of the number of bits

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