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6. Tutorial: A shift register is a cascade of flip flops, sharing the same clock, in which the output of each flip-flop is connected to the 'data' input of the next flip-flop in the chain, resulting in a circuit that shifts by one position the 'bit array' stored in it. "Shifting in' the data present at its input and 'shifting out the last bit in the array at each transition of the clock input is how this occurs. Shift registers can have both parallel and serial inputs and outputs. These are often configured as 'serial-in, parallel-out' (SIPO) or as 'parallel-in, serial-out' (PISO) 4-bit Parallel Data Output QA S FFA Data in FFB FFC FFD CLK LK LK LK CLR CLR CLR CLR Clear Clockn Figure 1: Serial In Parallel Out Register The shift register in this figure shifts one bit to data to the right