When adding 2 n-bit unsigned values, how can you tell if there has been overflow for the n-bit result? When adding 2 n-bit signed values, how can you tell if there has been overflow for the n-bit result? What is the goal of the Simple Processing System circuit? Describe the activity in each of the states needed in the operation of the Simple Processing System to accomplish its goal. What is the purpose of the temporary registers in the Simple Processing System? The system clock plays 2 significant roles at 2 different times in the operation of the Simple Processing System. What are the 2 roles? How can a single clock signal play 2 roles? (Explain!) Design the FSM tables for these operations: a. R5 leftarrow [R2] OR [R6] b. R7 leftarrow NOT [R3] Why is it necessary to have a unique FSM for each operation supported by the Simple Processing System? When the Simple Processing System is used to perform different operations, what are the things that are different (between operations)? What are the things that stay the same (between operations)? How can the differences between operations of the Simple Processing System be encoded? How can these encoded differences be integrated with the Control FSM to give a single FSM that can implement many operations? Describe why the addition of an encoded operation latch results in a Mealy state machine