Which Boolean identity causes the two pieces of Verilog code below to function in

the same manner?

Module Schematic$1($

input A$,$

input B$,$

input C$,$

output D

;

wire W$1$;

and AND$1($W$1,$ B$,$ C$)$;

or OR$1($D$,$ W$1,$A$)$;

endmodule

a$)$ Commutative

b$)$ Associative

c$)$ Null Identity

d$)$ Demorgan's Law

e$)$ Distributive