Question: Write a verilog code for binary to seven segment display(SSD) conversion with the module name as binary2ssd. The inputs are in1(MSB), in2, in3, in4(LSB), and

Write a verilog code for binary to seven segment display(SSD) conversion with the module name as binary2ssd.

The inputs are in1(MSB), in2, in3, in4(LSB), and should produce the 7 bit SSD value based on input.

Note: The verilog should be compiled clean. And, test bench should not be given with the code

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