Question: Write a Verilog dataflow description module BCD _ Adder ( Sum , Carry _ out, Addend, Augend, Carry _ in ) ; of a four

Write a Verilog dataflow description
module BCD_Adder (Sum, Carry_out, Addend, Augend, Carry_in);
of a four-bit binary coded decimal adder.
Begin by writing a four bit binary adder module. Instantiate this twice in your binary coded decimal module and use structural verilog to provide the outputs.
Write a Verilog dataflow description module BCD _

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