Write the in detail solution $($should include every step $)$ and VHDL code for implementing the following:

$($A$)$ A $1-$bit full adder circuit. The circuit takes $3$ inputs $(1-$bit each$)$ and produce $2$ outputs $(1-$bit each$).$

$($B$)$ Use the full adder as a component to design a $4-$bit adder$/$subtractor circuit which adds two $4-$bit number, if the choice bit is $0$ and subtracts the two $4-$bit number using $1$s complement method if the choice bit is $1.($Interpretation of the result is to be done manually$)$

$($C$)$ Write a testbench for $($B$)$ and demonstrate the output.