Question: Write the Verilog code for a 4-bit up counter that counts from the binary sequence 0101 up to 1010. This counter should count every positive

Write the Verilog code for a 4-bit up counter that counts from the binary sequence 0101 up to 1010. This counter should count every positive edge of the clock signal. The counter should reset to the initial state for every positive edge of the reset signal.

Run the code in the online simulator and insert a screenshot of the test bench file and the output. Make sure to display 10 printed values of the output of the counter while counting and make sure to mention your own name.

NOTE : USING EDA PLAYGROUND AND TOOL IS ICARUS VERILOG 0.9.7 AND SIMULATION

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