You have a cache that holds $4$ blocks, each block is $8$ Words. Initially the cache is empty

$($e$.$g$.$ all blocks are invalid$).$ The Main Memory is shown in the table below.

For the dot product code, below what is the final data in the cache assuming $($a$)$ direct

mapped $($b$)2-$way set associative and $($c$)$ fully associative? Empty tables for each type of

cache are below. Write a description of how each cache works $($hits and misses$)$ and how

you reached your end result. For simplicity, you can drop the top $16-$bits of the address in

the table and explanation.

$ $s0=010010000$

$$s1=010010080$

$ $s2=0$

$$s3=32$

If a read penalty is $50$ cycles, what is the actual CPI for this code for each type of cache.

Assume a $5-$stage MIPS processor with forwarding and perfect branch prediction.

Direct mapped cache:

$2-$way associative cache:

Fully associative cache:

Please help! thank you.