Design a PMOS version of the current source circuit shown in Figure 10.27. The circuit is to be biased at \(V^{+}=2.5 \mathrm{~V}\) and \(V^{-}=2.5 \mathrm{~V}\). The currents are to be \(I_{O}=0.6 \mathrm{~mA}\) and \(I_{\mathrm{REF}}=0.25 \mathrm{~mA}\). Use appropriate transistor parameters.

Transcribed Image Text:

V+= 5 V M3 IREF M2 M M2 M2 V-=-5 V Figure 10.27 Figure for Exercise TYU 10.7