The op-amp bias currents for the circuit in Figure P14.38 are equal at \(I_{B 1}=\) \(I_{B 2}=1 \mu \mathrm{A}\).

(a) Find the worst-case output voltages \(v_{O 1}\) and \(v_{O 2}\) for \(v_{I}=0\).

(b) Design input bias current compensation circuit(s) to adjust both \(v_{O 1}\) and \(v_{O 2}\) to zero when \(v_{I}=0\).

Transcribed Image Text:

10 ww 100 ww VI + +1 10 ww 50 ww Figure P14.38 + 102