Repeat Problem 12.5 c when the gates of M 3 and M 4 are the CMC input,

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Repeat Problem 12.5 c when the gates of M3and M4are the CMC input, and the gate of Mconnects to a bias voltage.

Data from Prob. 12.5 (c)

For the op amp in Fig. 12.2, use the data from Problem 12.4 except use ID5 = 100 µA and |Vov| = 0.1 V for all transistors. Assume all transistors operate in the active region with Cgs = 180 fF And Cgd = 20 fF.

(c) Calculate the common-mode control gain acmc.

Fig. 12.2:

VDD VBIAS M4 Мз o Vo2 Vo1* M2 Vi2 M1 M5 сте -Vss

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Analysis and Design of Analog Integrated Circuits

ISBN: 978-0470245996

5th edition

Authors: Paul R. Gray, ‎ Paul J. Hurst Stephen H. Lewis, ‎ Robert G. Meyer

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