A current-mirror op amp is shown in Fig. 12.59. Assume all NMOS transistors are matched and all PMOS transistors are matched. Use |V_ov| = 0.2 V for all transistors, V_tn= ˆ’V_tp= 0.6 V, I_D5= 200 µA, V_An= 10 V, |V_Ap| = 20 V, and γ = 0. Assume V_DD= V_SS= 1.65 V and V_ic= 0.

(a) Calculate the model parameters in Fig. 12.7a. Assume the gates of M₅, M₇, and M₉ connect to bias voltages.

(b) If the CMC input is the gate of M₅ and the gates of M₇ and M₉ connect to a bias voltage, compute a_cmc.

(c) If the CMC input connects to the gates of M₇ and M₉ and the gate of M₅ connects to a bias voltage, compute a_cmc.

(d) What are the output swing limits for each output? What value of V_OC gives the maximum symmetric output swing?

Fig. 12.59:

Fig. 12.7 (a):

VDD M6 M4 M Mg Vi2 M2 M1 Vi1 V02 V2 V1 M7 M5 Mg -V ss Rod Vid a dm Vid Vo2 Rod 2 i,2 Vo1 Roc Rod io1 2 4 a cm ic (a)