Repeat Problem 4.38, but assume that 2-kΩ resistors are placed in series with the emitters of Q₃and Q₄. Assume the worst-case resistor mismatch is ± 0.5 percent and the worst-case pnp β_Fmismatch is ± 10 percent.

Data from Prob. 4.38:

Determine the worst-case input offset voltage for the circuit of Fig. 4.58. Assume the worst-case I_S mismatches in the transistors are ± 5 percent and β_F = 15 for the pnp transistors. Assume the dc output voltage is V_SUP ˆ’ |V_BE(on)|.

Fig. 4.58:

Transcribed Image Text:

+VSUP Q4 Q3 V, = Vo+v, Q2 +6 V; = V, + v; 100 μΑ -VSUP