The CMOS circuit of Fig. 9.56 is to be used as a high-slew-rate op amp. A load

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The CMOS circuit of Fig. 9.56 is to be used as a high-slew-rate op amp. A load capacitance of CL= 10 pF is connected from Voto ground. Supply voltages are ± 5 V and I1= 20 µA. Devices M€“ M4have W = 20 µm and L = 1 µm and devices M5€“ M8have W = 60 µm and L = 1 µm. All other NMOS devices have W = 60 µm and L = 1 µm, and all other PMOS devices have W = 300 µm and L = 1 µm. Device data are μnCox= 60 µA/V2, Vtn= 0.7 V, Vtp= ˆ’ 0.7 V, γ = 0, and |λ| = 0.05 Vˆ’1.

Figure 9.56:

VpD Маз Mg M14 M40 iз M4. Mз in+ M2 M1 in- M8 M7 M6 M5 M15 M16 M42 -Vss

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Analysis and Design of Analog Integrated Circuits

ISBN: 978-0470245996

5th edition

Authors: Paul R. Gray, ‎ Paul J. Hurst Stephen H. Lewis, ‎ Robert G. Meyer

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