Explain why each of the following microoperations cannot be executedduring a single clock pulse in the system shown in Fig. 5-4. Specify a sequence of microoperations that will perform the operation. 

a. IR←M[PC] 

b. AC←AC + TR 

c. DR←DR + AC (AC does not change)

Fig. 5-4

Adder and logic LD LD LD Write LD Memory unit 4096 x 16 LD LD INR INPR AR INR CLR OUTR INR INR CLR INR CLR PC DR AC Read IR TR LD 16-bit common bus CLR CLR Address Clock Bus 2