Write an HDL module that implements the modified priority encoder from Exercise 2.37. 

Data from problem 2.37

Design a modified priority encoder that receives an 8-bit input, A_7:0, and produces two 3-bit outputs, Y_2:0 and Z_2:0 Y indicates the most significant bit of the input that is TRUE. Z indicates the second most significant bit of the input that is TRUE. Y should be 0 if none of the inputs are TRUE. Z should be 0 if no more than one of the inputs is TRUE. Give a simplified Boolean equation for each output, and sketch a schematic.