For the following SM chart,

(a) Draw a timing chart that shows the clock, the state (S₀, S₁, or S₂), the inputs (X₁, X₂, and X₃), and the outputs. The input sequence is X₁ X₂ X₃ = 011, 101,111,010,110,101,001. Assume that all state changes occur on the rising edge of the clock and the inputs change between clock pulses.
(b) Use the state assignment S₀: AB = 00; S₁: AB = 01; S₂: AB = 10. Derive the next-state and output equations by tracing link paths. Simplify these equations using the don€™t care state (AB = 11).
(c) Realize the chart using a PLA and D flip-flops. Give the PLA table (state transition table).
(d) If a ROM is used instead of a PLA, what size ROM is required? Give the first five rows of the ROM table. Assume a naïve ROM method is used (i.e., a full look-up table).

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