Question: Implement the following state table using a ROM and two D flip-flops. Use a straight binary state assignment. (a) Show the block diagram and the
(a) Show the block diagram and the ROM truth table. Truth table column headings should be in the order Q1 Q0 X D1 D0 Z.
(b) Write Verilog code for the implementation. Use an array to represent the ROM table, and use two processes.

Next State Output (Z) Present State X = 0 X = 1 X = 0 X= 1 So S, So S2 S, S2 S3 S3 S3 S3 S2
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a b module ROMQ3X Clk Z input X Clk output reg Z reg 10 Q Qplus reg 20 FSMR... View full answer
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