Two register transfer statements are given (otherwise, R1 is unchanged):

(a) Using a 4-bit counter with parallel load as in Figure 6-14 and a 4-bit adder as in Figure 4-5, draw the logic diagram that implements these register transfers.

(b) Repeat part (a) using a 4-bit adder as in Figure 3-43 plus external gates as needed. Compare with the implementation in part (a).

Figure 4-5

Figure 6-14

Figure 3-43

Transcribed Image Text:

C1: R1R1 + R2 Add R2 to R1 R1 R1 + 1 Increment R1 C1 C2: