1 Different instructions utilize different hardware blocks in the basic single-cvcle implementation. The next three problems in this exercise refer to the following instruction Interpretation a. AND Rd.Rs.Rt Reg[Rd]-Reg[Rs] AND Reg[Rt] Mem[Reg[Rs]+0ffs]-Reg[Rt] 1.1 What are the values of control signals generated by the control in Figure 1 for this instruction? MI Add ALU operation Data Regster # Register # Register # RegWrite MemWrite PCAddress Instruction Registers ALU Address Data Data MemRead Control Figure 1: The basic implementation of the MIPS subset, including the necessary multiplexors and control lines