1-Consider a Direct Mapped cache with 32-bit memory address reference word addressable. Assume a 2 word block and a Cache size of 8 locations. Each location has one Block.

Starting with an empty cache, assume the following memory address references in the corresponding order

What block address in memory is the underlined reference above map to?

Select one:

a. 90

b. 95

c. 91

d. 80

e. 2

2-Consider a Direct Mapped cache with 32-bit memory address reference word addressable. Assume a 2 word block and a Cache size of 8 locations.Each location has one block.

Starting with an empty cache, assume the following memory address references in the corresponding order

To what address in cache is the underlined reference above map to?

Select one:

a. 7

b. 4

c. 5

d. 6

e. 2

3-Consider a Direct Mapped cache with 32-bit memory address reference word addressable. Assume a 2 word block and a Cache size of 8 locations. Each location has one Block.

Starting with an empty cache, assume the following memory address references in the corresponding order

What is block offset in cache of the underlined reference above?

Select one:

a. 1

b. 0

c. 2

d. 3

e. 4