Question: Consider a Direct Mapped cache with 32-bit memory address reference word addressable. Assume a 2 word block and a Cache size of 8 locations. Each

Consider a Direct Mapped cache with 32-bit memory address reference word addressable. Assume a 2 word block and a Cache size of 8 locations. Each Location has one Block. Starting with an empty cache assume the following memory address references in the corresponding order Word addresses in Main Memory Address 3 180 43 21 191 88 190 14 181 44 186 253 is the underlined reference a hit or a miss in cache? Select one: a HIT b. MISS
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