Consider a Direct Mapped cache with 32-bit memory address reference word addressable. Assume a 2 word block and a Cache size of 8 locations. Each Location has one Block Starting with an empty cache assume the following memory address references in the corresponding order Word Addresses in Main Memory Address 3 180 43 2 191 88 190 14 181 44 186 253 What is the final memory address from the above references is located in cache address 2 that is after all references have been passed? Select one: O a MEM[2] b. MEM[181] c. MEM[253] O d. MEM[14) e none of the references F. MEME1801 2 g MEM[3] h. MEM[44] 1 | MM 4] MEM1901