1.Using Logisim, build and simulate an 8-bit full adder/subtractor introduced in your lecture notes using your FA subcircuit from Lab 1. As before, input pins will be used to set all input operands and control bits.

a. Your circuit must generate the N,Z,V,C flags.

b. In your lab report, you will create a table showing the results of at least eight test cases that verify your circuit operation. You will do this for both addition and subtraction. The table will show the operands, the expected result and expected flags, the actual result and the actual flags as measured by your simulation. Failure to produce this table for both addition and subtraction will render your circuit unverified and no credit will be given.

c. Create a subcircuit for your n-bit full adder/subtractor with 8-bit operands and the subtraction control bit as inputs, and, the 8-bit result and N,Z,V,C flags as outputs. This subcircuit will be used in Lab 3 and other upcoming labs.

2. A 4-bit digital lock requires the input 1001 in order to be activated, otherwise, it is inactive. Design a 4-input combinatorial logic circuit that can generate an activation signal only when the correct input is presented by applying the following steps:

a. Construct the truth table

b. Extract the appropriate minterm to construct the Boolean function

c. Design and then simulate the circuit using Logisim.

d. Verify the circuit operation by testing all possible input bit combinations listed in your truth table and report your results in your lab report.

3. Consider the modulo 2 sum of the bits of a 4-bit binary number. For example, 0000 0 (even parity), 0001 1 (odd parity), 0010 1 (odd parity), 0011 0 (even parity), 0100 1 (odd parity), , 0101 0 (even parity) and so on.

a. Construct the truth table showing the modulo 2 sum of the bits for all possible 4-bit binary numbers

b. Use the minterm design procedure to simulate a circuit that will output the modulo 2 sum of the bits (i.e. the parity) for all possible input 4-bit binary numbers

c. Verify the circuit operation by testing all possible input bit combinations listed in your truth table and report your results in your lab report.