Use Logisim

Design and Simulation Exercises 1. Using Logisim, build and simulate an 8-bit full adder/subtractor introduced in your lecture notes using your FA subcircuit from Lab 1. As before, input pins will be used to set all input operands and control bits. i. Your circuit must generate the N Z.V.C flags. ii. In your lab report, you will create a table showing the results of at least eight test cases that verify your circuit operation. You will do this for both addition and subtraction. The table will show the operands, the expected result and expected flags, the actual result and the actual flags as measured by your simulation. Failure to produce this table for both addition and subtraction will render your circuit unverified and no credit will be given. iii. Create a subcircuit for your n-bit full adder/subtractor with 8-bit operands and the subtraction control bit as inputs, and, the 8-bit result and N.Z.V.C flags as outputs. This subcircuit will be used in Lab 3 and other upcoming labs. Design and Simulation Exercises 1. Using Logisim, build and simulate an 8-bit full adder/subtractor introduced in your lecture notes using your FA subcircuit from Lab 1. As before, input pins will be used to set all input operands and control bits. i. Your circuit must generate the N Z.V.C flags. ii. In your lab report, you will create a table showing the results of at least eight test cases that verify your circuit operation. You will do this for both addition and subtraction. The table will show the operands, the expected result and expected flags, the actual result and the actual flags as measured by your simulation. Failure to produce this table for both addition and subtraction will render your circuit unverified and no credit will be given. iii. Create a subcircuit for your n-bit full adder/subtractor with 8-bit operands and the subtraction control bit as inputs, and, the 8-bit result and N.Z.V.C flags as outputs. This subcircuit will be used in Lab 3 and other upcoming labs